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With the support from our Partnering Publisher, we are giving away high quality microelectronics packaging related book to early registrant. The first ten conference registrant or the first registrant for each PDC will be entitle for a book.
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The 18th Electronics Packaging Technology Conference is an International event organized by the IEEE Reliability/CPMT/ED Singapore Chapter and sponsored by IEEE CPMT Society. EPTC 2016 will feature technical sessions, short courses/ forums, an exhibition, social and networking activities.
PROFESSIONAL DEVELOPMENT COURSES
The conference program includes six half day short courses conducted on 30th Nov 2016. Three courses will be conducted in the morning (PDC 1- 3), and three courses in the afternoon (PDC 4-6). The courses will be conducted by leading experts in the field.
- PDC 1: James E. Morris (Portland State University): “Nanotechnologies for Microelectronics PackagingApplications:Current trends in IoT, Wearable, 3D, Flex Circuits, Thermal and Embedded passives”
- PDC 2: Ingrid De Wolf (IMEC): “3D Integrated Failure Analysis”
- PDC 3: Albert Lan (SPIL): “Fan-In and Fan-Out in Wafer Level Packaging”
- PDC 4: Yogendra Joshi (Georgia Tech): “Energy Efficient Thermal Management of Data Centers”
- PDC 5: Holden Li (NTU):” Internet of Things (IoT) focusing on Wireless Sensors Network and Active RFID”
- PDC 6: Paul D. Franzon (NCSU): “2.5D- and 3D-Stacked Integrated Circuits”
There are special rate for PDC, details can be found here
- Advanced Packaging: Flip-chip, multiple array leadframe package, POP, System in Packaging, etc. TSV/Wafer Level Packaging: Fan-in/Fan-out, embedded chip packaging, 2.5D/3D integration, TSV, Silicon & Glass interposer, RDL, bumping technologies, etc.
- Interconnection Technologies: Au/Ag/Cu/Al Wire-bond technology, Flip-chip & Cu pillar technology, solder alternatives, Wafer level bonding & die attachment etc.
- Emerging Technologies: Packaging technologies for MEMS, biomedical, optoelectronics, Internet of things, photo voltaic, printed electronics, wearable electronics, Photonics, LED, etc.
- Materials and Substrates/Leadframes: from polymer to solder materials, and Substrates / Interposer /Leadframes / PCB etc.
- Processes and Automation/Equipments: new process as well as equipment automation development.
- Electrical Modeling & Simulations: Power plane modeling, signal integrity analysis of substrate/package.
- Mechanical Modeling & Simulations: Thermo-mechanical, moisture, fracture, fatigue, vibration, shock and drop modeling, Chip-package interaction, etc.
- Thermal Characterization & Cooling Solutions: Component, system and product level thermal management, characterization and simulation
- Quality & Reliability: Component, board, system and product level reliability assessment, Interfacial adhesion, accelerated testing, failure characterization, etc.
- Wafer/Package level & TSV Testing and Characterization: High-speed test architectures and systems design, 2.5D & 3D test methodologies, probe card design, package-test interaction, high-throughput testing etc.
- Kanji OTSUKA : How to Feed Enough to Greedy IoT Monster
- Jagadish CV: Achieving Automotive Quality Excellence: Zero Defect Performance – a Foundry’s Perspective
- Tom Dolbear: Packaging Matters
- Wenhui Zhu: Advances of 3D Integration in CHINA
- Shi-Wei Ricky Lee: Light-Emitting Diodes for Non-Lighting Applications
- Dr Bill Chen(ASE) : Semiconductor Industry Trend & Heterogeneous Integration
- David Hutt: Laser Processing of Printed Copper Interconnects On Polymer Substrates
- Yan Xiaojun: Packaging and Testing of High Speed Rotor for MEMS Gas Turbine Engines
- Christopher Bailey: 3D-Printing and electronic packaging: Current status and future challenges
- Arief Budiman: Enabling Design for Reliability in Advanced Interconnects for 3D IC and Next Generation Solar PV (Photovoltaics) Systems
- Alfred A. Zinn : A Novel NanoCopper-Based Advanced Packaging Material
- Bob Chylak: Opportunities and Challenges for Advance Packaging Equipment
- Dr. Rejeki Simanjorang: Requirement for Advanced-Packaging Technology of Power Semiconductor Module in High Power Density Converter for More Electric Transportation
- WonChul Do: Multi-die integration using advanced fan-out packaging technology
- Sebastien Gallois-Garreignot: In the IoT Development: How to Address Mechanical and Thermal Issue?
- Andreas Fischer: Package Miniaturization & Integration for Future Automotive Applications
- Chuan Seng Tan: Wafer Bonding as an Enabler for Microsystems Packaging and Integration
- Santosh Kumar: What’s happening in TSV based 3D/2.5D IC packaging: Latest market & technology trends
- Wilmer R. Bottoms, Ph.D:Innovations in Packaging will enable the IoT world of the Future
- YB Lin: Advanced MIS SIP Technology
- Li Ming: Materials and Processes of Fan-out Wafer/Panel Level Packaging
PANEL TOPIC HIGHLIGHTS
Title: “Rise of China Semiconductor”
Topics: Semiconductor industry statistics and projections in China, Government policies, Supply chain, Semiconductor manufacturing and Packaging technologies, Opportunities & Challenges for China and for other countries/areas
Panel Chair/modulator : Prof. Zhu Wenhui (Suzhou Speed Semiconductor technology Co., Ltd.)
Invited Panel List
- Tan Yong Tsong, Executive Director of IME (Singapore)
- Santosh Kumar, Senior Analysis of Yole Development (France)
- Bob Chylak, Vice President of KnS (US)
- Kai Fai Ng, President of SEMI SEA (Singapore)
- Albert Lan, Senior. Director of SPIL (Taiwan)
- Lung Chu, President of SEMI CHINA (China)
Final Paper Upload:
Please download the EPTC 2016 full paper template from :
Please check carefully on the guidelines governing paper content, format and conference protocol. Here is the FULL PAPER submission link:
http://itekcms.com/eptc16/paper/ and you can complete and upload the copyright form together with final paper in the same web page.
Conference registration, early-bird rates, and information on visas for visiting Singapore can be found at conference website (http://eptc-ieee.net). You or at least one of your co-authors needs to register for the conference in order to be able to present the paper and get the paper published in the IEEE EPTC 2016 proceedings. Registration system is open and here is the link for the same:
Early bird registration is till 30 September 2016. Standard registration starts from 1 October 2016.
Early Bird Room Rates – By 1st October 2016
Interactive (Poster) PREPARATION GUIDELINES:
Your interactive poster must be prepared and submitted in accordance to the guideline at https://eptc-ieee.net/resources/
Best Papers Awards:
The conference proceeding is an official IEEE publication and accepted paper will be available in IEEE Xplore. Author(s) of Best Industry paper , Best Academia paper, Best Interactive paper and Best Student Paper award sponsored by ASE will receive an award at the next conference EPTC 2017.
Submission of Final Manuscripts: 15 September 2016
Submission of Electronic Copyright Transfer Form: 15 September 2016
Last Day for Discounted Advance EPTC Registration: 30 September 2016
|Conference Registration Date (1st to 2nd December 2016)||Standard Registration|
|IEEE Member||Attendee (Full Conference)||SG$ 900|
|Authors/Speakers (Full Conference)||SG$ 800|
|Non-IEEE Member||Attendee (Full Conference)||SG$ 950|
|Authors/Speakers (Full Conference)||SG$ 900|
|Student||Attendee or Authors (Full Conference)||SG$ 600|
|Professional Development Course (PDC) Date (30th November 2016)
Note: PDC includes Luncheon
|IEEE Member||PDC Full (Both AM and PM)||SG$ 425|
|PDC Single (AM or PM)||SG$ 275|
|Non-IEEE Member||PDC Full (Both AM and PM)||SG$ 450|
|PDC Single (AM or PM)||SG$ 300|
|Student||PDC Full (Both AM and PM)||SG$ 275|
Ranjan Rajoo, General Chair
Xueren Zhang, Technical Chair
Conference Secretariat email@example.com